Etch Essentials: The Building Blocks of AI Era Microchips
The Flex tool
Lam Research’s Flex® tool uses dielectric etch; capable processes include ALE and RIE.
Jun 12, 2024
  • Every wafer undergoes many etching steps before the electronic circuit is formed and connected 
  • Etching is critical for creating complex structures and architectures for the AI era 

The artificial intelligence era depends on the storage infrastructure needed to run advanced technology, such as generative AI. The performance requirements for these AI innovations are pushing NAND devices to quickly scale to 400 vertically stacked layers and beyond.  

  • For readers who are new to semiconductors, that’s a big deal. Imagine a skyscraper with an unfathomable 400 floors, where each floor represents a layer of memory in a NAND device. Now, imagine adding 600 more floors to that building...only in semiconductors, this super tall structure is still invisible to the naked eye. Today, these devices range in height from a few micrometers (µm) to tens of micrometers. 

Going vertical requires precise etching and novel chemistry. For decades Lam has been an industry leader in addressing key challenges in this process—etching deeper, faster, as well as enabling complicated lateral and vertical scaling. Our unique solutions allow customers to build next-generation chips that power AI and leading-edge technologies.  

  • If you are unfamiliar with etch technology, you can read helpful explanations of terms in the glossary at the bottom of this article. 

What’s Etch? 

Modern silicon chips feature complex circuit patterns that conduct electricity through millions and even billions of transistors (a basic building block of electronics that switches electrical signals and power) and other types of devices. Some transistors are no wider than tens of silicon atoms.  

To create these circuit patterns, a precise removal of silicon and other materials from the wafer surface forms a path. This process is repeated again and again, creating layers of circuit paths. 

  • Etching refers to the manufacturing process by which material is removed from a wafer's surface, forming structures with specific depths and shapes. 

Etch Categories 

There are two main categories of etching in semiconductor manufacturing: 

In wet etching, a wafer is etched by a liquid solution containing etching chemicals. Wet etching relies on chemical reactions to remove materials on the wafer and is typically isotropic, meaning the etch rate is the same between the vertical direction and the horizontal direction.  

  • Wet etching can be very selective but has limited methods to control the final shapes of the post etch structure. It also often requires a drying step, which increases the risk of pattern collapse.  

Advanced process technologies rely more on dry etching to form desirable patterns and shapes on wafers. Dry etching uses gases and is typically conducted under a vacuum, where the volatility of etch byproducts is higher and can be pumped out.  

  • Plasma is commonly used in dry etching to generate more chemically reactive species called radicals by dissociating etchant gases, as well as to generate ions by ionizing the gases. The ions bombard the wafer surface and provide directionality (anisotropy) during etch, which is critical to form FinFET and Gate-all-around (GAA) devices. 

Cryogenic etching is a process, initially developed in the 1980s, that is re-emerging as a method of dry etching. The etch process is carried out at a low on-wafer temperature, typically below 0 degrees Celsius, with the temperature control unit operating at even lower temperatures. Cryogenic etching helps increase adsorption of reactive species while limiting the lateral etch rate.  

  • Together with new etch chemistries and advanced RF pulsing, cryogenic etching offers a faster etch rate and better directionality control in certain high aspect ratio etch applications. 

Tool Types 

Now that we’ve discussed the fundamentals of etching, let’s talk about the tools that perform these tasks. Etch tools are historically categorized into conductor etch tools and dielectric etch tools. With new technological inflections like FinFET and GAA, selective etch is emerging as a third etch tool segment. 

  • Conductor etch typically etches silicon, germanium, silicon germanium, metals, carbon, and thin layers of dielectrics, such as SiO2/SiN. These tools use inductively coupled plasma and often operate in high plasma density process regimes.  
  • Dielectric etch typically etches thick dielectric films (SiO2 and SiN) with high selectivity to other materials. These tools use capacitively coupled plasma and often operate in low plasma densities process regime with high-energy ions. 
  • Selective etch precisely removes materials from the wafer surface without modifying or damaging neighboring materials. A plasma may or may not be used, depending on selectivity and etch rate requirements. 

Etch Mechanisms 

Etching removes material through two basic mechanisms: 

  • Physically: Ions with sufficient energy dislodge atoms from the material. The process is also known as sputtering. The sputtered atoms may not be volatile and could deposit elsewhere on the surface (e.g. etched sidewalls). 
  • Chemically: etchant (radical) species form chemical bonds with the atoms at the surface and leave the surface in gas form. For example, four fluorine atoms can bond with a silicon atom, forming silicon tetrafluoride (SiF4) gas, and leave the wafer surface. However, an activation energy, often supplied through heat, is required for the chemical reaction to occur. Cryogenic etching suppresses chemical etching to achieve better etch sidewall profiles. 

More advanced etching mechanisms: 

  • Ion neutral synergy: a term coined by Lam’s previous chief technology officer, Rick Gottscho. During plasma etch, physical and chemical etching help each other and occur together. The ions provide the activation energy for the chemical reaction to occur, and the chemical component ensures volatile etch byproducts form and can be pumped away. Ion neutral synergy offers faster plasma etch than physical or chemical etch alone, with better control over selectivity and etch sidewall profile. 
  • Atomic layer etching (ALE): Self-limiting chemical reactions (adsorption) occur on the topmost atomic layer of the wafer modifying the top layer of the material, then the modified layer is activated by ions or another etchant to form volatile byproduct, which is removed from the surfaced (desorption) and purged. Both the adsorption and desorption steps can be designed with or without plasma. 

Lam’s Role 

As chipmakers continue scaling down their chips, the ability to etch precise channels is crucial for maintaining chip yield, effectiveness, and performance. Lam offers many product families for etch systems

Kiyo® - Conductor Etch - Transformer coupled symmetric chamber design and advanced plasma pulsing capability for market leading results across the wafer. 
Vantex™ - Dielectric Etch - Highest aspect ratio etching with tight CD (critical dimension) control and selectivity. Repeatable wafer-to-wafer performance enabled by advanced Equipment Intelligence®. 
Flex® - Dielectric Etch - Small volume confined plasma with advanced RF pulsing for profile control and high mask selectivity. 

Selis® - Selective Etch - High pressure ICP (inductively coupled plasma) source with high radical density; enabling isotropic selective etch with high throughput. 

Syndion® - TSV Etch - Transformer coupled symmetric chamber design with fast gas switching for market leading results. 

GAMMA® - Stand-Alone Strip - Large chamber volume with flexible high gas flow configurations, and multiple process stations for low defectivity and high productivity. 

Versys® - Metal Etch - Metal L/M/N series provide critical CD, profile, and selectivity required for advanced BEOL (Back End of Line) patterning applications. 


Adsorption refers to the process by which molecules or atoms from a gas or liquid adhere to the surface of a solid material. 

Aspect ratio refers to the ratio between the depth and the width of a structure. High aspect ratio structures are typically very tall with very small openings at the top. 

Capacitively coupled plasma is a type of plasma generated between two parallel electrodes in a vacuum chamber. 

Directionality refers to the property or characteristic of something that shows, has, or flows in a specific direction. 

Dissociation is breaking the bond(s) of a molecule into smaller and more reactive components, also known as radical species. 

Etch by-products are the secondary product formed during the etching process that can be pumped out when they are volatile. 

Etch rate represents the speed at which material is removed during the etching process. 

FinFET, Fin Field Effect Transistor, is a type of non-planar or "3D" transistor used in the design of modern processors. 

Inductively coupled plasma is a type of plasma source in which the energy is supplied by electric currents that are produced by electromagnetic induction. 

Pattern collapse refers to forces causing bending or mechanical instability of the photoresist layer, rendering the patterned features unusable for subsequent pattern transfer steps. 

Radical species are highly reactive chemical entities that participate in chemical reactions during plasma etching, leading to material removal and surface modification. 

RF pulsing refers to the technique of modulating radio frequency (RF) energy in a pulsed manner rather than continuously. 

Selectivity refers to the difference in etch rate between two materials during an etching process. 

Volatility is the tendency of a substance to evaporate at nominal temperatures. 


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