This article is part of Lam's International Women's Day story collection which amplifies the voices of employees embracing equity across the company.
- Gosia’s redirection in her studies resulted in a 20+ year long career in semiconductors
- A little bit of luck and a whole lot of talent got her to where she is today
I sat down with Gosia Jurczak, managing director, Advanced Technology Development, to talk about the semiconductor industry’s next inflection points, her early days of being a non-French speaker in France, and her career journey.
What do you do at Lam?
I explore technological horizons. I am responsible for Lam’s relationship with imec and IBM, two of our R&D partners, and together we explore, test, and validate new processes and integration concepts that define next-generation solutions. These programs feed Lam’s internal learning and prepare us for when our product groups begin interacting with customers on solving the next big breakthrough. We have long-standing relationships with both partners. It started long before I joined Lam in January 2019. Our partnership with imec is nearly 20 years old and with IBM more than 10 years old. Together, with our partners, we’re already thinking…what’s next?
So, what is next?
A new transistor architecture is emerging – the complementary field-effect transistor (CFET) – which is an evolution of the vertically stacked gate-all-around (GAA) nanosheet transistor. This folding of NMOS and PMOS provides benefits for further area scaling.
To enable cell area scaling and reduce congestion on the front side of the wafer, power rails are being moved to the back side of a wafer.
A big change for the back-end-of-line (BEOL) is moving from damascene copper metallization into barrier-less metals like ruthenium patterned with subtractive lithography. The new metallization scheme, combined with airgap as an intermetal dielectric, provides RC benefits and paths for further scalability.
Continued device scaling would not be possible without advanced lithography. EUV lithography has already entered high volume manufacturing and the number of applications where EUV lithography will be adopted is rapidly increasing. High numerical aperture (high-NA) EUV is the next lithography evolution that will enable imaging even smaller features on a wafer. Lam’s dry photoresist technology helps to address challenges of future DRAM and logic technology nodes by providing dose-to-size and dose-to-defectivity performance for higher EUV scanner productivity.
How did you get to where you are today?
Well, it’s a little bit of luck and coincidence. (laughter)
At school, I wanted to become a software engineer, but my university entry exam results were not ranked high enough to get admitted into information science, a very popular area of study at that time. I was redirected to study electrical engineering, and it wasn’t that bad. (laughter) It was actually really interesting because it involved lots of physics. It was the people who I interacted with that got me excited about this area of study. I also realized that my work was at the heart of creating semiconductor chips and that triggered a huge interest.
After I completed my Ph.D. in electrical engineering in Poland, the semiconductor industry that was once present in the country was basically nonexistent. So, I had two choices: first, pivot and enter the telecommunications industry which was booming at the time, or second, pursue a career in semiconductors abroad. I received an opportunity to work at CNET, a division of France Telecom, that was an R&D center for STMicroelectronics in Grenoble, France, developing new CMOS transistor architectures. I worked on some really exciting projects, like Silicon-on-Nothing (SON) which is the foundation of today’s GAA nanosheet technology, and my work there solidified my decision to stay in the industry.
These two years in Grenoble were the most productive years in my career and they opened opportunities for me to work elsewhere. It’s from my time there that I got a job offer from imec and without thinking too much, moved to Belgium which is where I have stayed for the past 20 years holding several positions at imec, ASM, and Lam.
What is it like being a woman in a majority-male industry?
In our industry, it’s not uncommon that I’m the only woman in the room. In my experience, the more you move toward eastern Europe, the more common it is to be in an environment that is predominately male in the technology space. During my studies in Poland, I had a professor ask me if I was studying electrical engineering because I was interested in the field or because I was looking for a husband. When I moved to western Europe – France and Belgium – I was impressed by how many more women were working in the industry. I’ve been very lucky in my professional career to work with male colleagues and supervisors who have been advocates for women and have believed in me and my capabilities. I never felt different.
Over time, I have seen gains in representation – more and more women are appearing in the industry and holding leadership positions. For example, at last year’s IEEE International Electron Device Meeting (IEDM), a forum for showcasing breakthroughs in semiconductor and electronic device technology, the entire leadership team was female – for the very first time. Throughout the conference it was stressed how unique this leadership team was and while it shows a positive shift, it also signifies that we’re still a minority.
The semiconductor industry is very demanding. It’s very challenging to balance this work – which definitely goes beyond a 9-to-5 – with family. I have always admired the women who are mothers and have high-ranking positions and manage both – not just in this industry but in any industry.
What advice would you give to women entering the field?
Follow your interests, stop doubting your skills and do not hesitate to grab opportunities that may emerge. Don’t be afraid to work in a field in which men are a majority. Being a woman is not a disadvantage.
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