MyLam
Seeing Double: How Digital Twins Can Revolutionize Chipmaking
Oct 24, 2024
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  • Intelligent machines enable faster design, production, maintenance, and process improvements 
  • Numerous benefits can be gained from self-aware, self-maintained, and adaptive tools  

Since the invention of the transistor more than 75 years ago, technology—and semiconductor technology in particular—has advanced at a rapid and accelerating pace. We’ve reached the point where smart manufacturing equipment powered by advanced chip technology and artificial intelligence (AI) is itself producing the next generation of computer chips. This has created a virtuous cycle of innovation, where computer chips and machine learning are helping produce new, more powerful chips even faster and better than before. 

Intelligent Machines 

What is intelligence? At Lam Research, we use Max Tegmark's definition as presented in Life 3.0: Being Human in the Age of Artificial Intelligence: "An ability to accomplish complex goals." If there is one thing we know about Lam, we have “complex goals,” all of which need "accomplishing." 

Tegmark’s three attributes of intelligence are self-awareness, self-maintenance, and adaptability. It is perhaps unsurprising, then, that we assign these same attributes to our Equipment Intelligence® solution: 

  • Self-aware tools know what parts are inside and the properties of those parts, both past and present. Benefits of such tools include the ability to detect potential equipment failures before they occur to prevent costly downtime and disruptions, and continuous monitoring of manufacturing processes to identify defects or inconsistencies in real time. 
  • Self-maintained tools know when maintenance is required and perform maintenance automatically. Benefits of such tools include reduced tool downtime and enhanced fab productivity. 
  • Adaptive tools adjust themselves to compensate for changes in the manufacturing process and variations in incoming material. Benefits of adaptive tools include consistent quality and yield. 

A prominent example of a tool that contains all three attributes is Lam's latest generation etch product, Sense.i®, which uses machine learning algorithms to autonomously monitor its own performance, identify potential issues, and adjust settings to optimize wafer processing, allowing it to adapt and self-maintain with minimal human intervention.  

Lam is making impressive progress toward our Equipment Intelligence product vision of self-aware, self-maintained, and adaptive tools. But there is much more to be imagined. 

Virtual Representations 

Lam’s leadership position has been established by taking on our customers’ and our industry’s grand challenges: affordability, sustainability, and speed-to-solution. The digital twin is a relatively new technology that has the potential to help us meet these challenges—a virtual representation of a process or physical asset that allows designers and maintenance professionals to understand and predict how the process or asset behaves.  

Digital twins help Lam keep pace with market demands by enabling faster design, deployment, and maintenance of leading-edge equipment and processes without sacrificing the affordability, sustainability, and speed-to-solution our customers demand. 

Digital twins can take many forms, including: 

  • Virtual equipment builds are representations of specific tools (or chambers within a tool) that allow engineers and technicians to design, test, and optimize chamber layouts, equipment configurations, and process flows before physical construction or modification.  

Lam is piloting the use of digital content to perform DFX (design for manufacturing, design for serviceability, etc.) assessments to identify issues such as part interference and pinch points before expensive physical builds take place. These virtual builds enable speed-to-market with higher quality products at lower cost. For example, by first building our Altus® family of tools virtually, we were able to accelerate our transition time by four months. 

  • Virtual fabrication processes are simulations that can reduce the number of physical wafer test cycles needed to produce a chip.  

Lam’s SEMulator3D®, a process modeling platform based on highly efficient physics-driven voxel modeling technology, can create such virtual fab processes. SEMulator3D follows an integrated process flow description starting from input design data to create the virtual equivalent of the complex, 3D structures made in a fab. SEMulator3D process modeling and analysis is used for fast and accurate “virtual fabrication” of advanced nano-fabrication processes, allowing engineers to understand manufacturing effects early in the development process and reduce time-consuming and costly learning cycles. 

Virtual Work 

At Lam, we use digital twins for tool-to-tool (fleet) matching and process performance improvements. We can construct virtual metrology by using tool and sensor data as surrogates for metrology data.  

As shown in the figure below, combining our Equipment Intelligence Data Analyzer (EI-DA) technology with on-wafer results allows us to build an algorithm that provides predictive capabilities for advanced process control (APC), a method in which the process controller adapts to a system's variable or unknown parameters. 

the Lam Equipment Intelligence platform enables tool-to-tool (fleet) matching and process performance improvements

All images derived from Joseph Ervin‘s SEMICON West 2024 presentation on digital twins

Another way Lam uses digital twins is by coupling EI-DA with a chamber-level digital twin to optimize performance. Rather than manually capturing low-frequency measurements of random wafers, a combination of tool and sensor data allow EI-DA to measure every wafer for critical dimensions (CDs), giving us the ability to monitor entire lots and flag individual out-of-control (OOC) wafers, resulting in a reduction in scrapped wafers and in deviations from the intended process specifications. 

The Equipment Intelligence Data Analyzer prediction provides for chamber-level digital twin advanced performance

To do good virtual metrology, you need a good virtual model, and this is the value of SEMulator3D. By gathering critical dimension target measurements from a physical semiconductor using cross-sectional scanning electron microscopy (XSEM) or transmission electron microscopy (TEM), and then using those measurements in process model training, SEMulator3D can build such a model. 

Prescriptive (Predictive and Sensitive) Digital Twin

Lam’s Law 

To keep up with increasingly challenging customer problems, Lam adds parameters and controls to our tools, increasing complexity and leading to more recipe optimization problems. There are now an astronomical number of possible recipe combinations available. We capture this observation by what we call “Lam's Law.” 

As if the number of possible combinations isn’t daunting enough, we have few chances to get the process right in any customer engagement. In a typical demo, we run 150 samples—out of trillions of possibilities. What this means is that process engineering relies on consecutive (and good) decisions to push us closer to the customer’s target. 

Fortunately, we have excellent engineers who have been able to win customer trust engagement after engagement. But with so many choices, one starts to wonder if a machine could help us make better decisions. 

Lam's Law versus Moore's Law

Human/AI Hybrid 

Lam recently ran experiments to determine whether AI alone (using digital twins), engineers working alone, or a collaboration between engineers and AI would achieve the lowest cost-to-target recipe in a virtual high aspect ratio (HAR) plasma etch process. In the process (depicted below), there are 11 incoming parameters and six output metrics. The target profile is shown, along with examples of possible profiles that do not meet specifications. For the purposes of the experiments, each wafer and each recipe were each valued at $1,000, based on actual costs. 

virtual high aspect ratio plasma etch

Spoiler alert: The human/AI hybrid model achieved the lowest cost-to-target. Human engineers start by what we call “rough tuning,” which relies on engineers’ knowledge of macro trends, physics principles and models, tribal knowledge, previous trends, and the like. Engineers enjoy this stage, as they make progress early and quickly. 

The next stage (which is much less enjoyable and much more frustrating) is a long, slow slog toward satisfying all specs simultaneously. By giving the long, slow slog over to AI (stages A → E in the chart below) experiments show savings of countless hours and millions of dollars—in fact, chip development costs were reduced by 50% from the benchmark set by expert process engineers with more than seven years of experience working without AI. 

Human Expert advantage occurs early in development

Since the study, Lam has used the human-first, computer-last (HF-CL) model to reduce time to solution with real reactors, real wafers, and real recipe development. Based on these findings, combining AI with virtual process development can save millions of dollars in materials and equipment, and countless hours for our engineers. 

human-first machine-last saves countless hours and millions of dollars

Virtual Fabs? 

Can we represent an entire fab with a single digital twin? 

Imagine an entire virtual fab, including tool footprints, travel paths for humans and wafers, and processes. Such a digital twin could help identify bottlenecks and inefficiencies in the manufacturing process, enabling targeted improvements to optimize operations.  

By simulating emergency scenarios, potential hazards and risks could be caught and addressed before they occur, or responders could be allowed to develop effective response plans, improving safety and reducing the likelihood of accidents. New equipment or processes could be virtually tested and optimized before physical implementation, reducing costs and time-to-market.  

A digital fab could provide a safe and controlled environment for training employees, allowing them to develop problem-solving and decision-making skills without the expense of experimenting in a live fab. 

Cornell University has created a simple virtual fab using digital twin models for lithography and plasma etch. One of Cornell’s objectives is to demonstrate the feasibility of a true digital twin fab. Another is to study data connectivity, security, and standards for different vendors of fab equipment, as they all present challenges in building digital twins. 

Virtual Family 

Because digital twins exist at different levels (parts, tools, processes, etc.), interconnectivity between them is needed to tackle the biggest challenges in chip manufacturing. However, forward and backward connectivity between digital twins is challenging due to data mismatches and the level of detail required by each, and computational complexity limits the ability to connect everything into a single digital twin.  

Furthermore, each digital twin is built for a different purpose and doesn’t necessarily contain the attributes needed to satisfy other uses. While machine learning can be used to create forms of digital twins, it cannot solve every digital twin problem now. 

We just might need a digital twin family. By using appropriate levels of abstraction we can overcome computational complexity and connectivity issues. This will be the path forward for future advancements using digital twins. 

 

Joseph Ervin is senior director and product line head, Semiverse Solutions 

 

Caution Regarding Forward-Looking Statements 
Statements made in this article that are not of historical fact are forward-looking statements and are subject to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Such forward-looking statements relate to but are not limited to: market and industry trends; the potential benefits and opportunities of virtual solutions and artificial intelligence on our products and processes; and our ability to meet and exceed product design and development expectations. Some factors that may affect these forward-looking statements include: trade regulations, export controls, trade disputes, and other geopolitical tensions may inhibit our ability to sell our products; business, political and/or regulatory conditions in the consumer electronics industry, the semiconductor industry and the overall economy may deteriorate or change; the actions of our customers and competitors may be inconsistent with our expectations; supply chain cost increases and other inflationary pressures have impacted and may continue to impact our profitability; supply chain disruptions or manufacturing capacity constraints may limit our ability to manufacture and sell our products; and natural and human-caused disasters, disease outbreaks, war, terrorism, political or governmental unrest or instability, or other events beyond our control may impact our operations in affected areas; as well as the other risks and uncertainties that are described in the documents filed or furnished by us with the Securities and Exchange Commission, including specifically the Risk Factors described in our annual report on Form 10-K for the fiscal year ended June 30, 2024. These uncertainties and changes could materially affect the forward-looking statements and cause actual results to vary from expectations in a material way. The Company undertakes no obligation to update the information or statements made in this article. 

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