- Glass substrates offer mechanical, electrical, and chemical advantages for AI and HPC chips
- Industrywide adoption first requires resolving manufacturing and standardization issues
- Lam is helping scale glass-panel based packaging solutions
Driving the news: Glass has long been used in semiconductor packaging as a temporary round carrier in advanced packaging manufacturing. The industry is now developing large rectangular-shaped carrier (panel) and more advanced permanent applications—like glass-core package substrates—to support larger, denser AI and high-performance computing packages.
- Glass substrates are gaining momentum in advanced packaging because of their unique mechanical, electrical, and chemical properties.
Why it matters: Glass substrates support more complex, high-density chip assemblies, enabling breakthroughs in AI and high-performance computing (HPC) accelerators.
- In panel-level packaging, glass substrates act as a temporary carrier in large, rigid panels to provide strong dimensional stability, with higher area utilization that can help reduce waste and lower costs.
- For future IC substrates, glass is being developed as a permanent core material, offering dimensional stability and tunable thermal expansion that could enable larger, denser packages with finer interconnects for next-generation AI and HPC systems.
Lam Research is investing in the research, process expertise, and panel-processing hardware to support customers as they address manufacturing challenges that come with glass panel packaging.
- Lam’s Kallisto™ panel electroplating system supports substrates of varying thicknesses and dimensions and can handle high-aspect ratio through glass via (TGV) filling and fine pitch redistribution layer (RDL) lines.
- The Phoenix panel processing system can handle thin glass substrates and boosts output and productivity, supporting the scaling of glass-based solutions.
Glass Substrates Is Important for Advanced Packaging
Although glass is made of silicon atoms, glass substrates stand apart from traditional organic and silicon substrates in several ways.
- A compelling feature is glass’s coefficient of thermal expansion (CTE), which is the extent to which a material expands or contracts with heat or cold. Glass CTE can be tuned to closely match silicon and is significantly lower than organic substrate CTE levels.
- The quality of Glass CTE helps prevent warpage during thermal cycling, a major concern in multi-die or large-die packaging. The result is more reliable, robust packages that can withstand the rigors of modern electronics manufacturing.
- Surface flatness is another area where glass excels. Its exceptionally even surface enables fine line/space patterning down to two microns on the glass, supporting the creation of intricate interconnects required for next-generation devices.
- The inherent dimensional stability of glass substrates makes them ideal for packaging multiple chips together, providing the mechanical stability needed for complex, high-density assemblies.
- Electrically, glass offers superior isolation for wiring, helping preserve signal integrity. This is a critical factor as data rates and integration levels increase.
- Glass’s low dielectric loss and high resistivity enable high-speed, low-loss signal transmission, making it a top choice for radio frequency (RF), high-performance computing (HPC), and 2.5D/3D integration.
How Are Glass Substrates Used in Advanced Packaging?
Glass substrates shine wherever tight dimensional control, high signal integrity, and dense interconnects are required.
- For AI accelerators, glass is used as a temporary carrier to fabricate a fine line organic interposer connecting the HBM and core logic dies. For future AI accelerator generations, glass is being developed as a core substrate that enables ever larger packages to house more chips together.
- For 5G RF modules operating above 28 GHz, glass’s low dielectric loss reduces signal attenuation and crosstalk, for clean, reliable transmission.
- Photonic integrated circuits (ICs) also benefit from glass’s optical transparency, which allows for the integration of optical waveguides, complementing silicon photonics platforms.
What Are the Challenges of Manufacturing Glass Substrates?
The stability of glass, while beneficial in many ways, also can create challenges during manufacturing.
- Glass is brittle, leading to major challenges in handling, singulation, and defect management.
- Forming features inside glass for electrical wiring—whether through mechanical or laser-induced deep etching—requires extreme care to avoid chipping or cracking adjacent sections.
- Depositing metallic films onto glass is also tricky, requiring advanced plating processes that can adhere to glass and fill wiring features with copper.
- For example, adhesion promoters are often used before electroless seed deposition, and through-glass vias (TGVs) require specialized electroplating to fill open channels on both sides of the glass.
- Handling large panels (greater than 500 mm) demands vacuum or edge-grip tools to prevent breakage, and thermal processing must be carefully ramped to avoid stress fractures.
What Is Needed to Scale Glass Substrate Packaging?
Glass carriers are established in production, while permanent glass interposers and glass-core IC substrates remain at earlier stages of development and adoption. Before glass substrates are adopted widely, the industry must address manufacturability and standardization challenges as panel sizes, via specifications, and material stacks vary across suppliers, complicating integration and scaling.
Lam continuously collaborates with substrate makers, OSATs (outsourced semiconductor assembly and test providers), equipment manufacturers, and material suppliers to co-optimize solutions for demanding electroplating applications.
Glass substrate adoption is still evolving, with technical, manufacturing, and ecosystem hurdles to overcome. But the potential benefits—higher performance, greater integration, new applications, and more efficient panel processing—make glass an important material to watch as semiconductor packaging advances.