- 2 nm chips are a major advancement in computing across AI, cloud, HPC, and more
- Lam’s Aether® dry‑resist technology plays a key role in enabling this node
Driving the news: The semiconductor industry is reaching a significant milestone: the arrival of 2 nanometer (2 nm) logic (GPU and CPU) chips in mainstream manufacturing.
- TSMC recently announced mass production of 2 nm chips, with other chip manufacturers, including Intel and Samsung, actively advancing in this area with products soon available on the market.
Each new logic node historically delivers more transistors, better performance, and lower power—yet the transition to 2 nm is especially significant. To understand what “2 nm node” means, see our article What Is a Node?
Why it matters: At 2 nm, device dimensions push the limits of physics, requiring entirely new materials, patterning techniques, and process control strategies.
For cloud infrastructure, 2 nm processor chips enable higher compute density per rack, meaning more virtual machines, faster scaling, and reduced energy per operation.
High‑performance computing (HPC) dramatically increases throughput and floating‑point performance, meaning scientific modeling, weather prediction, and molecular simulations run faster than ever.
Artificial intelligence (AI) workloads—particularly training and inference for large‑scale models—benefit from lower latency and improved performance per watt, which affect cost and sustainability.
For the typical consumer, 2 nm chips bring more intelligence to smaller form factors, enabling everything from faster mobile experiences to longer battery life in wearables, home electronics, and emerging personal‑AI hardware.
Lam’s Role in Next-Gen Logic
Lam Research has played a central role at every inflection point in semiconductor patterning. By working closely with customers, Lam equips chipmakers with the tools needed to pattern the ever‑tighter pitches required for leading‑edge devices.
Lam’s contribution to 2 nm includes Aether® dry resist technology, which was qualified for direct-print, 28 mn pitch, back end of line (BEOL) logic at the 2 nm node and below.
The use of dry resist is highly advantageous for 2 nm node patterning and beyond, addressing some of the toughest challenges in modern lithography. Imec has qualified Aether for direct-print 28-nm pitch back end of line (BEOL) logic at the 2 nm node and below.
One of those challenges—resist stochasticity—becomes a critical limiter at atomic-scale dimensions. That is, random variations in how photons interact with resist materials can cause line‑edge roughness, bridging, or missing features.
Aether dry resist is designed to mitigate these effects through more uniform absorption, higher etch resistance, and better pattern fidelity.
- Dry resist also offers several cost, structural, and process advantages that are essential at 2 nm:
- Lower dose requirements, reducing EUV exposure time and overall cost of ownership
- Higher etch resistance, enabling thinner stacks and better pattern transfer
- Wider process windows, improving yield robustness
- Single‑print EUV capability, which is increasingly critical as multi‑patterning becomes cost‑ and defect‑prohibitive at advanced nodes
2 nm chips will shape the next advances in computing innovation across a wide range of technologies. Lam is leading the way by innovating at the atomic scale, opening up possibilities for performance, efficiency, and device capabilities.