Blog

Higher memory densities can be achieved with 3D NAND by increasing the number of metal and oxide layers. We looked at how to avoid tier bending and collapse that can accompany increasing layers using SEMulator3D.

Advanced patterning techniques are essential for manufacturing next-generation semiconductor chips with extremely small and precise features, enabling higher performance, greater functionality, and improved cost efficiency in logic, DRAM, and NAND devices.

Gowri explains the challenges faced by chipmakers as they turn to 3D structures for logic, memory, and storage to continue Moore’s Law.

Dextro™ revolutionizes fab maintenance with sub-micron precision and AI-driven capabilities

Tiny changes in critical dimension, gate height, and similar features of advanced logic devices, such as FinFET SRAM, can affect yield. Through virtual experiments using the SEMulator3D® platform, the Semiverse Solutions team discusses how material stress and mechanical deformation resulting from these changes can be managed to enhance device performance.

AI’s evolution could be thwarted by electrical resistance in 3D architectures. Molybdenum, a breakthrough material, reduces resistance, improves performance.

Ion Beam Etch (IBE) is a promising technology for extreme ultraviolet (EUV) lithography by significantly improving line edge roughness (LER) and line width roughness (LWR).

A microchip (also known as a “chip” or “integrated circuit” [IC]) is a chunk of semiconducting material embedded with billions of transistors.

The semiconductor industry is transitioning from tungsten to molybdenum (Mo) to meet the demands of the AI era Mo’s lower resistivity and lack of barrier layer enable scalability while...

Lam Research has been honored with the prestigious 2025 Edison Gold Award for Innovation in Production Processes, recognizing its Cryo™ 3.0 cryogenic etch technology.