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Abstract In this article, we demonstrate a pathfinding technique for a novel Vertical DRAM technology. First, we identify important process parameters (defined by current semiconductor production...

Li Fei Sun won for her paper on smart tools and ML solutions in semiconductor manufacturing In the past four years, Lam engineers have won the top award three times At Lam Research, we take pride...

There are still many challenges to be overcome before CFET designs become mainstream, but this new 3D architecture represents a promising new direction for the future of computing.

On the use and benefits of virtual fabrication in the development of DRAM saddle fin profiles

We explore the causes and implications of asymmetric wafer defects in semiconductor manufacturing. We also consider the use of virtual process modeling to understand and mitigate these structural failures.

The potential of Resistive Random Access Memory (ReRAM) as an alternative to SRAM for on-chip memory in advanced CPU applications.

Virtual process development tools can accelerate the identification of process hotspots. These techniques lead to cost savings and improved yields in chip manufacturing.

Virtual fabrication is a powerful tool to perform sensitivity analysis and provide guidance for inline process spec control

BEOL module processing faces challenges as chipmakers move to the 3 nm node and beyond. A semi-damascene integration scheme with airgap structures may help reduce RC delay time.

Lam Research and the Centre for Nano Science and Engineering (CeNSE) at the Indian Institute of Science (IISc) partner to train up to 60,000 semiconductor engineers.