| Su | Mo | Tu | We | Th | Fr | Sa |
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| Su | Mo | Tu | We | Th | Fr | Sa |
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|Oct 31, 2025|The article discusses the challenges and solutions for back-end-of-line (BEOL) patterning at the 3-nm semiconductor node, focusing on controlling critical process parameters to manage edge placement error (EPE) and critical dimension (CD) variability.
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|Oct 29, 2025|Students at a growing number of U.S. schools learn the “why” of advanced 3D processes SEMulator3D® helps students with immersive training on leading edge technologies.
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|Oct 7, 2025|Fabtex™ Yield Optimizer is a new Semiverse® Solutions product designed to improve yield and reduce process variability in high-volume semiconductor manufacturing.
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|Sep 30, 2025|Virtual twins and process modeling speed up semiconductor development by simulating and optimizing designs before fabrication. This case study shows how to address etch uniformity issues from etch loading in slit patterns, enabling faster, more precise process optimization.
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|Sep 24, 2025|Lam Research offers a range of advanced tools and technologies designed to support semiconductor manufacturing, focusing on precision, innovation, and improving chip production processes. These solutions include etch and deposition systems, process control tools, and software products aimed at next-generation device fabrication.
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|Aug 29, 2025|Hybrid metallization using Mo is a promising alternative to conventional copper dual damascene.
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|Aug 5, 2025|Lam Research is addressing critical challenges in the U.S. semiconductor industry by partnering with universities to enhance semiconductor engineering education through Semiverse® Solutions.
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|Jul 29, 2025|Higher memory densities can be achieved with 3D NAND by increasing the number of metal and oxide layers. We looked at how to avoid tier bending and collapse that can accompany increasing layers using SEMulator3D.
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|Jul 2, 2025|SEMulator3D® software is useful for semiconductor process modeling and virtual design Engineers can easily and vividly visualize complicated 3D structures with the tool Semiverse® Solutions,...
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|Jun 2, 2025|Tiny changes in critical dimension, gate height, and similar features of advanced logic devices, such as FinFET SRAM, can affect yield. Through virtual experiments using the SEMulator3D® platform, the Semiverse Solutions team discusses how material stress and mechanical deformation resulting from these changes can be managed to enhance device performance.
