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Deposition is when a thin layer of material is added to the surface of a wafer Each deposition process varies depending on the material and the purpose it serves on a chip The Semi 101 series is a...

By leveraging compact and neural network models, we predict capacitance performance with unprecedented accuracy.

Lam Research offers a broad array of industry-leading tools and solutions designed to scale high-bandwidth memory (HBM).

Sometimes the technology behind the scenes is just as impressive as the one that gets all the attention. So, it is with Generative AI. While most everyone seems to be falling over themselves...

CheePing Lee explains how Lam Research is at the forefront of pioneering solutions like high-bandwidth memory (HBM) and hybrid bonding

Digital twins help increase precision, affordability, sustainability, and speed-to-solution. Semiverse Solutions helps find the best process flow or recipe out of infinite combinations.

The field of TCAD, once a humble tool in the vast landscape of semiconductor technology, has unveiled its invaluable riches

Lam’s Equipment Intelligence® was recognized as the 2024 Innovative Product of the Year in the AI/Machine Learning category at the Sensors Awards

Learn about three key semiconductor markets and Lam’s role in supporting our customers Find out what innovative technology is driving each market and Lam’s tools that help enable it Lam...

To harness full potential of AI, we must contend with several grand challenges to enable 1,000-layer scaling.

“Scaling to 1000-Layer 3D NAND in the AI Era" is a pivotal white paper written by Counterpoint Research and sponsored by Lam Research.

Discover how Lam Research is achieving unprecedented storage capacities and speeds with their 1,000-layer 3D NAND chips.

Lam Cryo™ 3.0 builds on 20 years of pioneering memory etch technology and five years of production proven cryogenic etch technologies. The tool overcomes manufacturing challenges in scaling 3D NAND vertically, laterally, and logically.

Lam Research has been an etch leader for decades, including by pioneering technology in cryo etch.

On how to reduce transistor capacitance at the 5nm node using a source/drain contact recess.

Explore the critical role of semiconductor innovation in the AI revolution with our in-depth white paper, highlighting the transformative effects of AI and the future of chiplet-based solutions.

Abstract As conventional DRAM devices continue to shrink, increases in parasitic capacitance at smaller dimensions can negatively impact device performance.

Pulsus enables the deposition of high-quality, highly scandium-doped AlScN films

Etching is critical for creating complex structures and architectures for the AI era

The event is the only startup competition with a monetary award for semiconductor startups

Her expertise in physical chemistry, process engineering, and business strategy help shape our industry. A new appointment on a prestigious committee extends Lam’s influence.

This study demonstrates how deposition-etch cycling can reduce LER and improve device performance.

The requirements of the AI era demand integrated core chips, driving vertical integration. Chip makers are just now beginning limited production of 3D packaging.

Lam plays a significant role in plasma science by collaborating with researchers, supporting the Allis Prize, and employing physics, chemistry, and engineering students and experts.

Abstract In this article, we demonstrate a pathfinding technique for a novel Vertical DRAM technology. First, we identify important process parameters (defined by current semiconductor production...