Blog

Advanced packaging makes it possible to manufacture higher performing, next-gen chips. Read about what makes advanced packaging different from traditional chip packaging methods today.

Hybrid metallization using Mo is a promising alternative to conventional copper dual damascene.

Lam Research is addressing critical challenges in the U.S. semiconductor industry by partnering with universities to enhance semiconductor engineering education through Semiverse® Solutions.

Explore what a semiconductor node really means in today’s chipmaking world. Learn how node sizes have evolved and why they matter for performance, efficiency, and innovation.

Higher memory densities can be achieved with 3D NAND by increasing the number of metal and oxide layers. We looked at how to avoid tier bending and collapse that can accompany increasing layers using SEMulator3D.

Lam continues to demonstrate our commitment to both performance and sustainability

Advanced patterning techniques are essential for manufacturing next-generation semiconductor chips with extremely small and precise features, enabling higher performance, greater functionality, and improved cost efficiency in logic, DRAM, and NAND devices.

SEMulator3D® software is useful for semiconductor process modeling and virtual design Engineers can easily and vividly visualize complicated 3D structures with the tool Semiverse® Solutions,...

Gowri explains the challenges faced by chipmakers as they turn to 3D structures for logic, memory, and storage to continue Moore’s Law.

Dextro™ revolutionizes fab maintenance with sub-micron precision and AI-driven capabilities