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DRAM is volatile memory that has the advantages of simplicity and high density. Lam is continuously innovating for each DRAM inflection as data-intensive AI requires more and more data at higher speeds.

Lam’s newest innovation, the VECTOR® TEOS 3D tool, is crafted at its Tualatin, Oregon facility by a talented local workforce known for its multidisciplinary expertise. The company’s strong commitment to employee safety, career satisfaction, and professional growth has resulted in an outstanding retention rate, making Tualatin a standout example of manufacturing excellence.

Manufacturing breakthroughs in advanced chip packaging—especially heterogeneous integration and 3D stacking—are critical to powering the future of AI.

Watch the video on the next wave of semiconductor innovation with advanced packaging solutions from Lam Research.

Self-aligned backside contact (SABC) architectures in advanced GAA transistors expand the process window, reducing defects and improving chip yield.

Molybdenum hybrid metallization is driving innovation in semiconductor materials for AI, 5G, and data centers. These advances boost performance, sustainability, and efficiency in chip manufacturing.

The article discusses the challenges and solutions for back-end-of-line (BEOL) patterning at the 3-nm semiconductor node, focusing on controlling critical process parameters to manage edge placement error (EPE) and critical dimension (CD) variability.

Cooperative robots take center stage at FIRST Global in Panama Lam is a pioneer in semi mechatronics, like Dextro

Students at a growing number of U.S. schools learn the “why” of advanced 3D processes SEMulator3D® helps students with immersive training on leading edge technologies.

At Lam we're pairing human ingenuity with advanced mechatronics and automation to solve big challenges for our customers. That same spirit will be on display at the 2025 FIRST Global Challenge.

Lam CVP David Fried explains how Fabtex Yield Optimizer is the newest Semiverse Solutions technology to help the semiconductor industry achieve higher yields

an in-depth look at the challenges facing the industry as AI, memory, and logic demands accelerate

The Colorado School of Mines award is given to its most generous contributors Research investigates ways to improve etch selectivity, thermal ALD, and more Share this news with your network

Lam Research earned the 2025 SEMI Award for North America for our pioneering cryogenic etch technology

Fabtex™ Yield Optimizer is a new Semiverse® Solutions product designed to improve yield and reduce process variability in high-volume semiconductor manufacturing.

A critical step toward enabling the next wave of advanced packaging

Virtual twins and process modeling speed up semiconductor development by simulating and optimizing designs before fabrication. This case study shows how to address etch uniformity issues from etch loading in slit patterns, enabling faster, more precise process optimization.

Lam Research offers a range of advanced tools and technologies designed to support semiconductor manufacturing, focusing on precision, innovation, and improving chip production processes. These solutions include etch and deposition systems, process control tools, and software products aimed at next-generation device fabrication.

Advanced packaging is a critical technology driving the performance, efficiency, and form factor improvements of AI chips, enabling the ongoing AI revolution.

HBM's 3D stacked architecture delivers 16x higher bandwidth than traditional memory. Lam Research leads the industry in HBM manufacturing equipment

TEOS 3D delivers high-quality, void-free thick dielectric film deposition for advanced packaging. Its proprietary clamping technology handles challenging high-bow wafers.

Advanced packaging makes it possible to manufacture higher performing, next-gen chips. Read about what makes advanced packaging different from traditional chip packaging methods today.

Hybrid metallization using Mo is a promising alternative to conventional copper dual damascene.

Lam Research is addressing critical challenges in the U.S. semiconductor industry by partnering with universities to enhance semiconductor engineering education through Semiverse® Solutions.

Explore what a semiconductor node really means in today’s chipmaking world. Learn how node sizes have evolved and why they matter for performance, efficiency, and innovation.

Higher memory densities can be achieved with 3D NAND by increasing the number of metal and oxide layers. We looked at how to avoid tier bending and collapse that can accompany increasing layers using SEMulator3D.

Advanced patterning techniques are essential for manufacturing next-generation semiconductor chips with extremely small and precise features, enabling higher performance, greater functionality, and improved cost efficiency in logic, DRAM, and NAND devices.

Gowri explains the challenges faced by chipmakers as they turn to 3D structures for logic, memory, and storage to continue Moore’s Law.

Dextro™ revolutionizes fab maintenance with sub-micron precision and AI-driven capabilities

Tiny changes in critical dimension, gate height, and similar features of advanced logic devices, such as FinFET SRAM, can affect yield. Through virtual experiments using the SEMulator3D® platform, the Semiverse Solutions team discusses how material stress and mechanical deformation resulting from these changes can be managed to enhance device performance.

AI’s evolution could be thwarted by electrical resistance in 3D architectures. Molybdenum, a breakthrough material, reduces resistance, improves performance.

Ion Beam Etch (IBE) is a promising technology for extreme ultraviolet (EUV) lithography by significantly improving line edge roughness (LER) and line width roughness (LWR).

A microchip (also known as a “chip” or “integrated circuit” [IC]) is a chunk of semiconducting material embedded with billions of transistors.

The semiconductor industry is transitioning from tungsten to molybdenum (Mo) to meet the demands of the AI era Mo’s lower resistivity and lack of barrier layer enable scalability while...

Lam Research has been honored with the prestigious 2025 Edison Gold Award for Innovation in Production Processes, recognizing its Cryo™ 3.0 cryogenic etch technology.

Lam's Semiverse Solutions team explores the innovative approach of backside power delivery networks (BSPDNs) in semiconductor technology.

The Semi 101 series is a beginner’s guide to understanding microchips and the semiconductor industry – from components to processes and everything in between. This guide is updated regularly.

Lam engineers worked with a customer to develop a short-term solution that has the potential to reduce the use of high GWP gases like NF3 that is also relatively easy to implement and doesn’t jeopardize the quality of the production.

DWMG structures can help improve DRAM by reducing energy waste. These structures fix a known flaw called “gate-induced drain leakage” (GIDL).

Lam’s latest etch tool, called Akara®, is a significant achievement that helps enable the future of semiconductors requiring small, complex structures. Akara uses proprietary plasma processing technologies to deliver a high degree of etch process control and responsiveness that goes beyond the capabilities of mainstream plasma etch technologies.

Lam has developed the world's only EUV dry resist deposition and dry development technologies with capabilities that support leading-edge pattern fidelity, defectivity, material usage, and overall cost of ownership.

To evaluate stress and mitigate its effects, predictive 3D process models can be used to predict the impact of mechanical stress on yield and performance.

Lam Research's new cobot, Dextro, can offload some of the most challenging and essential maintenance and cleaning tasks from human workers.

Virtual twin technologies can reduce the carbon footprint of the tool R&D process.

Lam’s university collaborations supports Lam’s technology pipeline and talent pipeline with creative approaches to industry challenges.

Dextro, the industry’s first maintenance cobot, works alongside engineers to keep machines in good working order for improved overall yields.

The latest advancements in semiconductor interconnect technologies, focusing on optimizing metal pitch structures for sub-2nm nodes.

Process engineers can generate a uniform, targeted etch result using predictable etch mechanisms and behavior.

VizGlow® 3.1, Lam’s latest release of its plasma-modeling software, brings significant advances in plasma simulations.

Intelligent machines enable faster design, production, maintenance, and process improvements. Numerous benefits can be gained from self-aware, self-maintained, and adaptive tools.

Deposition is when a thin layer of material is added to the surface of a wafer Each deposition process varies depending on the material and the purpose it serves on a chip The Semi 101 series is a...

By leveraging compact and neural network models, we predict capacitance performance with unprecedented accuracy.

Lam Research offers a broad array of industry-leading tools and solutions designed to scale high-bandwidth memory (HBM).

Sometimes the technology behind the scenes is just as impressive as the one that gets all the attention. So, it is with Generative AI. While most everyone seems to be falling over themselves...

CheePing Lee explains how Lam Research is at the forefront of pioneering solutions like high-bandwidth memory (HBM) and hybrid bonding

Digital twins help increase precision, affordability, sustainability, and speed-to-solution. Semiverse Solutions helps find the best process flow or recipe out of infinite combinations.

The field of TCAD, once a humble tool in the vast landscape of semiconductor technology, has unveiled its invaluable riches

Lam’s Equipment Intelligence® was recognized as the 2024 Innovative Product of the Year in the AI/Machine Learning category at the Sensors Awards

Learn about three key semiconductor markets and Lam’s role in supporting our customers Find out what innovative technology is driving each market and Lam’s tools that help enable it Lam...

To harness full potential of AI, we must contend with several grand challenges to enable 1,000-layer scaling.

“Scaling to 1000-Layer 3D NAND in the AI Era" is a pivotal white paper written by Counterpoint Research and sponsored by Lam Research.

Discover how Lam Research is achieving unprecedented storage capacities and speeds with their 1,000-layer 3D NAND chips.

Lam Cryo™ 3.0 builds on 20 years of pioneering memory etch technology and five years of production proven cryogenic etch technologies. The tool overcomes manufacturing challenges in scaling 3D NAND vertically, laterally, and logically.

Lam Research has been an etch leader for decades, including by pioneering technology in cryo etch.

On how to reduce transistor capacitance at the 5nm node using a source/drain contact recess.

Explore the critical role of semiconductor innovation in the AI revolution with our in-depth white paper, highlighting the transformative effects of AI and the future of chiplet-based solutions.

Abstract As conventional DRAM devices continue to shrink, increases in parasitic capacitance at smaller dimensions can negatively impact device performance.

Prestis enables the deposition of high-quality, highly scandium-doped AlScN films

Etching is critical for creating complex structures and architectures for the AI era

The event is the only startup competition with a monetary award for semiconductor startups

Her expertise in physical chemistry, process engineering, and business strategy help shape our industry. A new appointment on a prestigious committee extends Lam’s influence.

This study demonstrates how deposition-etch cycling can reduce LER and improve device performance.

The requirements of the AI era demand integrated core chips, driving vertical integration. Chip makers are just now beginning limited production of 3D packaging.

Lam plays a significant role in plasma science by collaborating with researchers, supporting the Allis Prize, and employing physics, chemistry, and engineering students and experts.

Abstract In this article, we demonstrate a pathfinding technique for a novel Vertical DRAM technology. First, we identify important process parameters (defined by current semiconductor production...

Li Fei Sun won for her paper on smart tools and ML solutions in semiconductor manufacturing In the past four years, Lam engineers have won the top award three times At Lam Research, we take pride...

Introducing Prestis, Lam's cutting-edge pulsed laser deposition tool. PLD enables specialty technologies like RF filters and MEMS microphones.

There are still many challenges to be overcome before CFET designs become mainstream, but this new 3D architecture represents a promising new direction for the future of computing.

Interest in artificial intelligence is driving data storage expansion for memory makers. Advancements in semiconductor manufacturing etch and deposition, and advanced packaging are playing a...

One-of-a-kind contest supports semiconductor startups with investment and exposure

On the use and benefits of virtual fabrication in the development of DRAM saddle fin profiles

On the use of molybdenum as a promising candidate to replace tungsten in the semiconductor industry to keep pace with Moore's Law

We explore the causes and implications of asymmetric wafer defects in semiconductor manufacturing. We also consider the use of virtual process modeling to understand and mitigate these structural failures.

Semiconductor manufacturers scale new heights as they embrace vertical integration. Lam’s Metior succeeds where optical measuring falls short.

The potential of Resistive Random Access Memory (ReRAM) as an alternative to SRAM for on-chip memory in advanced CPU applications.

Virtual process development tools can accelerate the identification of process hotspots. These techniques lead to cost savings and improved yields in chip manufacturing.

Summary: The rise of Artificial Intelligence (AI) has placed significant demands on semiconductor performance, particularly in the realm of etching technology. AI requires massive amounts of data...

Enables more efficient process development via high-fidelity plasma simulation

The semiconductor industry is searching for alternative metal line materials to replace copper due to the increasing barrier size and resistivity issues. Ruthenium (Ru) has shown promise as a potential replacement, outperforming copper and cobalt (Co) at smaller dimensions.

Virtual fabrication is a powerful tool to perform sensitivity analysis and provide guidance for inline process spec control

Lam Research has supported the National GEM Consortium and GEM interns since 2019. Students who complete their fellowship have a chance to join Lam full-time.

Video games and virtual and augmented reality are driving demand for haptics. Lam’s pulsed laser deposition capability can enable next-gen haptics technology.

BEOL module processing faces challenges as chipmakers move to the 3 nm node and beyond. A semi-damascene integration scheme with airgap structures may help reduce RC delay time.

Lam Research and the Centre for Nano Science and Engineering (CeNSE) at the Indian Institute of Science (IISc) partner to train up to 60,000 semiconductor engineers.

DRAM is following NAND in going 3D, but architecture needs are unique and challenging. 3D DRAM is needed to keep up with the demands of graphics cards, portable devices, and more. Here's an idea of how to architect it.

Up to 60,000 engineers in India to be trained on Lam’s unique virtual fabrication platform

New portfolio joins physical and virtual semiconductor worlds into a single ecosystem

Addresses key manufacturing challenges and significantly improves wafer yield Builds on Lam's 15-year heritage of innovation in bevel solutions

As transistor sizes shrink, short channel effects make it more difficult for transistor gates to turn a transistor ON and OFF [1]. One method to overcome this problem is to move away from planar...